Q)What will happened if there occur external interrupt while communicating through I2C interface.?
Answer1)depends if you have a software I2C interface or if you use the TWI perihperal as I2C interface. the last will only be affected at the moment it needs to be serviced by interrupt.
Answer2)You should never miss an interrupt ( INT0 or other ) whatever you are doing. The processor sets a flag bit to say that an IRQ has occurred.
The interrupt will be serviced as soon as the AVR is ready. The AVR will always do the lowest number ISR() first. So INT0 and INT1 will be serviced before TWI or USART etc. But they all get serviced in the end.
Answer3)I2C use a handshake mechanism (SCL stretching), so it can be interrupted without harming something.
Answer4)you will never miss that an interrupt occurred, but you can miss multiple interrupt events. If, for example, two INT0 interrupts occur whilst interrupts are disabled, the processor will only execute the INT0 handler once upon enabling global interrupts.
Answer5)It depends on how good the slave implementaion is. I had occasion to use a "smart" Lithium battery pack(that incidentally used an AVR). The I2C slave implementation had a timeout "feature" that effectively crashed if there was a delay of more than a few hundred uS mid-transaction.
It didn't affect my old-school firmware, but another company, developing a separate product for the same client, using the same battery pack, came unstuck because they were using an RTOS, and higher priority tasks could suspend the I2C transactions for relatively long periods.
Crappy practice at both ends of the I2C bus, IMO, but something to be aware of.
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